This invention relates to a circuit arrangement comprising a first long-tailed pair of first and second transistors, a second long-tailed pair of third and fourth transistors, a first load impedance connected to the output electrode of one transistor of the first pair, second and third load impedances connected to the output electrodes of the third and fourth transistors, respectively, a first coupling from said first load impedance to the control electrode of one transistor of the second pair, a second coupling from said second load impedance to the control electrode of said second transistor, first and second capacitive elements connecting said first and second couplings, respectively, to a reference potential point so that a first voltage-to-current converter, including said one transistor of the second pair, couples said first capacitive element to said second capacitive element and a second voltage-to-current converter, including said second transistor, couples said second capacitive element to said first capacitive element, the signal path through one of said converters passing through only one transistor of the corresponding pair so that said one converter is inverting, the signal path through the other of said converters passing through both transistors of the corresponding pair so that said other converter is non-inverting, a third coupling from a signal input to the control electrode of said first transistor so that a first amplifier including said first transistor couples said signal input to said first capacitive element, a fourth coupling from a reference potential point to the control electrode of the other transistor of the second pair, a fifth coupling from said third load impedance to a signal output so that a second amplifier including said fourth transistor couples said first capacitive element to said signal output, and a resistor included in series or parallel with a said capacitive element.
An arrangement of the kind set forth is disclosed in, for example, an article entitled "A fully integrated five-gyrator filter at video frequencies" by K. W. Moulding and G. A. Wilson, in "IEEE Journal of Solid-state circuits", Vol. SC-13, No. 3, June 1978, pages 303-307, particularly FIG. 7 on page 305. This known arrangement operates as a band-pass filter: the interconnected first and second voltage-to-current converters constitute a gyrator circuit the two ports of which are loaded by the first and second capacitive elements, respectively. Consequently the port to which the first capacitive element is connected appears inductive (because of the loading of the other port by the second capacitive element), so that if an input signal is applied (via the first amplifier) to the parallel combination of the first capacitive element and the relevant port, and the signal appearing across this parallel combination is taken off via the second amplifier, the input/output characteristic will have a second order band-pass nature.
There is considerable emphasis at the present time on constructing electronic circuitry, as much as possible in integrated circuit form, in the interests of cost reduction and reliability. Indeed, the possible replacement of filter circuits constituted by discrete inductors and capacitors by integrated circuits, particularly in television receivers, was the reason for the development of the known band-pass filter. Another television receiver component which it would be desirable to construct in integrated circuit form is the so-called "luminance delay line" which normally has to be provided in order that the television luminance signal be subjected to the same overall delay in the receiver as is the chrominance signal. The luminance delay line normally has to produce a delay of approximately 400 nS and should, of course, have a substantially constant amplitude-versus-frequency characteristic over the entire frequency range of the luminance signal and a substantially linear phase response over this range. In theory, an appropriate so-called "all-pass" network where, to permit integration, any inductance required is constituted by one port of a gyrator circuit, the other port of which is capacitively-loaded, could have these properties. To be successful such a network constructed in integrated circuit form should contain as few circuit elements as possible (to minimize the chip area required) and be designed so that its overall properties are as little sensitive as possible to production spreads occurring in the manufacture of the circuit. It is an object of the invention to provide an "all-pass" circuit arrangement which can have these features.